tl/f/5351 MM54HC4017/mm74hc4017 decade counter/divider with 10 decoded outputs january 1988 MM54HC4017/mm74hc4017 decade counter/divider with 10 decoded outputs general description the MM54HC4017/mm74hc4017 is a 5-stage johnson counter with 10 decoded outputs that utilizes advanced sili- con-gate cmos technology. each of the decoded outputs is normally low and sequentially goes high on the low to high transition of the clock input. each output stays high for one clock period of the 10 clock period cycle. the carry out- put transitions low to high after output 9 goes low, and can be used in conjunction with the clock enable to cascade several stages. the clock enable input dis- ables counting when in the high state. a reset input is also provided which when taken high sets all the decoded outputs low except output 0. the MM54HC4017/mm74hc4017 is functionally and pinout equivalent to the cd4017bm/cd4017bc. it can drive up to 10 low power schottky equivalent loads. all inputs are protected from damage due to static discharge by diodes from v cc and ground. features y wide power supply range: 2 6v y typical operating frequency: 30 mhz y fanout of 10 ls-ttl loads y low quiescent current: 80 m a (74hc series) y low input current: 1.0 m a connection diagram dual-in-line and flat package tl/f/5351 1 order number MM54HC4017 or mm74hc4017 c 1995 national semiconductor corporation rrd-b30m105/printed in u. s. a.
absolute maximum ratings (note s1&2) if military/aerospace specified devices are required, please contact the national semiconductor sales office/distributors for availability and specifications. supply voltage (v cc ) b 0.5 to a 7.0v dc input voltage (v in ) b 1.5 to v cc a 1.5v dc output voltage (v out ) b 0.5 to v cc a 0.5v clamp diode current (i ik ,i ok ) g 20 ma dc output current, per pin (i out ) g 25 ma dc v cc or gnd current, per pin (i cc ) g 50 ma storage temperature range (t stg ) b 65 cto a 150 c power dissipation (p d ) (note 3) 600 mw s.o. package only 500 mw lead temperature (t l ) (soldering 10 seconds) 260 c operating conditions min max units supply voltage (v cc )26v dc input or output voltage 0 v cc v (v in ,v out ) operating temp. range (t a ) mm74hc b 40 a 85 c mm54hc b 55 a 125 c input rise or fall times v cc e 2.0v (t r ,t f ) 1000 ns v cc e 4.5v 500 ns v cc e 6.0v 400 ns dc electrical characteristics (note 4) t a e 25 c 74hc 54hc symbol parameter conditions v cc t a eb 40 to 85 ct a eb 55 to 125 c units typ guaranteed limits v ih minimum high level 2.0v 1.5 1.5 1.5 v input voltage 4.5v 3.15 3.15 3.15 v 6.0v 4.2 4.2 4.2 v v il maximum low level 2.0v 0.5 0.5 0.5 v input voltage ** 4.5v 1.35 1.35 1.35 v 6.0v 1.8 1.8 1.8 v v oh minimum high level v in e v ih or v il output voltage l i out l s 20 m a 2.0v 2.0 1.9 1.9 1.9 v 4.5v 4.5 4.4 4.4 4.4 v 6.0v 6.0 5.9 5.9 5.9 v v in e v ih or v il l i out l s 4.0 ma 4.5v 4.2 3.98 3.84 3.7 v l i out l s 5.2 ma 6.0v 5.7 5.48 5.34 5.2 v v ol maximum low level v in e v ih or v il output voltage l i out l s 20 m a 2.0v 0 0.1 0.1 0.1 v 4.5v 0 0.1 0.1 0.1 v 6.0v 0 0.1 0.1 0.1 v v in e v ih or v il l i out l s 4.0 ma 4.5v 0.2 0.26 0.33 0.4 v l i out l s 5.2 ma 6.0v 0.2 0.26 0.33 0.4 v i in maximum input v in e v cc or gnd 6.0v g 0.1 g 1.0 g 1.0 m a current i cc maximum quiescent v in e v cc or gnd 6.0v 8.0 80 160 m a supply current i out e 0 m a note 1: absolute maximum ratings are those values beyond which damage to the device may occur. note 2: unless otherwise specified all voltages are referenced to ground. note 3: power dissipation temperature derating e plastic ``n'' package: b 12 mw/ c from 65 cto85 c; ceramic ``j'' package: b 12 mw/ c from 100 cto125 c. note 4: for a power supply of 5v g 10% the worst case output voltages (v oh , and v ol ) occur for hc at 4.5v. thus the 4.5v values should be used when designing with this supply. worst case v ih and v il occur at v cc e 5.5v and 4.5v respectively. (the v ih value at 5.5v is 3.85v.) the worst case leakage current (i in , i cc , and i oz ) occur for cmos at the higher voltage and so the 6.0v values should be used. ** v il limits are currently tested at 20% of v cc . the above v il specification (30% of v cc ) will be implemented no later than q1, cy'89. 2
ac electrical characteristics v cc e 5v, t a e 25 c, c l e 15 pf, t r e t f e 6ns symbol parameter conditions typ guaranteed units limit f max maximum clock frequency measured with 50 30 mhz respect to carry line t phl ,t plh maximum propagation 26 44 ns delay, enable to carry-out line t phl ,t plh maximum propagation 27 44 ns delay enable decode-out lines t phl ,t plh maximum propagation 23 40 ns delay, reset or clock to decode out t phl ,t plh maximum propagation 23 40 ns delay, reset or clock to carry out t s minimum clock inhibit to clock 12 20 ns set-up time t w minimum clock or reset pulse width 8 16 ns t rem minimum reset removal time 20 10 ns ac electrical characteristics v cc e 2.0 6.0v, c l e 50 pf, t r e t f e 6 ns (unless otherwise specified) t a e 25 c 74hc 54hc symbol parameter conditions v cc t a eb 40 to 85 ct a eb 55 to 125 c units typ guaranteed limits f max maximum clock frequency measured with 2.0v 6 5 4 mhz respect to carry line 4.5v 30 24 20 mhz 6.0v 35 28 24 mhz t phl ,t plh maximum propagation 2.0v 89 250 312 375 ns delay, enable to carry-out line 4.5v 25 50 63 75 ns 6.0v 20 43 54 65 ns t phl ,t plh maximum propagation 2.0v 90 250 312 375 ns delay, enable to decode out line 4.5v 25 50 63 75 ns 6.0v 20 43 54 65 ns t phl ,t plh maximum propagation 2.0v 82 230 288 345 ns delay, reset or clock to decode out 4.5v 22 46 58 69 ns 6.0v 18 39 49 59 ns t phl ,t plh maximum propagation 2.0v 82 230 288 345 ns delay, reset or clock to carry out 4.5v 22 46 58 69 ns 6.0v 18 39 49 59 ns t w minimum reset, clock, or 2.0v 30 80 100 120 ns clock enable pulse width 4.5v 9 16 20 24 ns 6.0v 8 14 18 21 ns t rem minimum reset removal time 2.0v 100 125 150 ns 4.5v 20 25 30 ns 6.0v 17 21 25 ns t s ,t h minimum clock inhibit 2.0v 50 63 75 ns to clock set-up or hold time 4.5v 10 13 15 ns 6.0v 9 11 13 ns t thl ,t tlh maximum output rise 2.0v 30 75 95 110 ns and fall time 4.5v 8 15 19 22 ns 6.0v 7 13 16 19 ns t r ,t f minimum input rise and fall time 2.0v 1000 1000 1000 ns 4.5v 500 500 500 ns 6.0v 400 400 400 ns c pd power dissipation (per package) pf capacitance (note 5) c in maximum input capacitance 5 10 10 10 pf note 5: c pd determines the no load dynamic power consumption, p d e c pd v cc 2 f a i cc v cc , and the no load dynamic current consumption, i s e c pd v cc f a i cc . 3
logic and timing diagrams MM54HC4017/mm74hc4017 tl/f/5351 2 tl/f/5351 3 4
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MM54HC4017/mm74hc4017 decade counter/divider with 10 decoded outputs physical dimensions inches (millimeters) dual-in-line and flat package order number MM54HC4017j or mm74hc4017j,n ns package number j16a dual-in-line and flat package order number mm74hc4017n ns package number n16e life support policy national's products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of national semiconductor corporation. as used herein: 1. life support devices or systems are devices or 2. a critical component is any component of a life systems which, (a) are intended for surgical implant support device or system whose failure to perform can into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life failure to perform, when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can effectiveness. be reasonably expected to result in a significant injury to the user. national semiconductor national semiconductor national semiconductor national semiconductor corporation europe hong kong ltd. japan ltd. 1111 west bardin road fax: ( a 49) 0-180-530 85 86 13th floor, straight block, tel: 81-043-299-2309 arlington, tx 76017 email: cnjwge @ tevm2.nsc.com ocean centre, 5 canton rd. fax: 81-043-299-2408 tel: 1(800) 272-9959 deutsch tel: ( a 49) 0-180-530 85 85 tsimshatsui, kowloon fax: 1(800) 737-7018 english tel: ( a 49) 0-180-532 78 32 hong kong fran 3 ais tel: ( a 49) 0-180-532 93 58 tel: (852) 2737-1600 italiano tel: ( a 49) 0-180-534 16 80 fax: (852) 2736-9960 national does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and national reserves the right at any time without notice to change said circuitry and specifications.
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